FIX and simple high-frequency algorithms on FPGA

October 30th, 2009

I wonder why predominant percent of high-frequency projects are still using C++, rather than FPGA (I assume as much by categorizing requirements for such job postings).

For example, doing quote stream decoding (something like FIX protocol) in C++ is very good but not perfect when performance is omnipotent. Another area is cross-exchange arbitrage, where order routing speed is critical for success of the strategy.

What could be the reasons for this? Both C++ and FPGA solution require full release cycle – compile, link, release; I imagine C++ static build is preferred to minimize operational costs on resources (so no dynamically linked dll’s that could be re-used).

Few reasons I could see are lack of FPGA developers (could be easily corrected by a serious shop through training), lack of awareness of such solution by decision makers, or cost-benefit ratio (which in this case boils down to speed comparison) is too small to move C++ based solution to FPGA.
I would imagine moving entire algo trading solution to FPGA is prohibitive, as number of logic transistors on a given card is limited – but I can definitely see pushing into FPGA basic operations like FIX protocol encoding/decoding, WAP, VWAP, TWAP.

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